In circuit failure analysis, such as Ultra-Large Scale Integration (ULSI) circuit failure analysis, Transmission Electron Microscopes (TEMs) are typical tools that may be used. For preparation of TEM samples, the circuits for testing have to undergo preparation and localisation procedures. The circuits typically comprise multi-layered structures on a wafer substrate.
TEM samples are typically prepared so that they may be viewed in either cross-sectional or planar-view orientations (where the orientations are with respect to the circuits).
For planar-view TEM samples, the circuits on wafers are typically first mechanically polished and lapped from the back surface of the wafers to an extent that the layer in which the area to be viewed is almost reached. Typically, the thickness of the relevant remaining circuits are about 50 μm. Dimpling is then typically performed to obtain a final thickness of the relevant remaining circuits of about 5 μm. Ion milling (for example, Ar+ milling) is then typically carried out on the remaining circuits such that the specific area is located in a wedge-like region around a crater or hole milled. This region is then used for TEM imaging.
The above approach is time-consuming and may result in mechanical damage to the TEM sample. Furthermore, typically, it is difficult to determine if the area being ion milled is the correct area, ie. there are limited visual aids available in current planar-view TEM sample preparation techniques.
For cross-sectional view TEM samples, localization of specific areas for TEM analysis is typically achieved with the use of a Scanning Electron Microscope (SEM) in a dual beam Focused Ion Beam (FIB) system. As illustrated in FIG. 1, the SEM beam column (102) and a tilted FIB column (104) are calibrated and adjusted to “coincide” on a sample at a “coincidental” point (106). Using this technique, the specific area to be localised may be marked out by the SEM beam column (102) while the actual milling of the area may be conducted with the FIB column (104).
With reference to FIG. 2 (a), a typical circuit (202) comprising multi-layered structures is disposed on a substrate (204). A site of interest (206) to be imaged in cross-sectional view by the TEM is being prepared for imaging. Two trenches, for example, (208) and (210), are ion milled on either side of the site of interest (206). It has to be noted that although ion milling with the substrate in a planar orientation, the area to be viewed on the prepared site of interest (206) is a cross-sectional area (212) of the site of interest (206).
With reference to FIG. 2 (b), the TEM sample preparation process in FIG. 2 (a) is illustrated in another perspective view. As noted above, trenches, (208) and (210), have been ion-milled on either side of the site of interest (206). The site of interest is then “cut-out” via typical U-shaped ion milling cut (213) and lifted using an electrostatic probe (not shown). It is noted that the final TEM sample (214) obtained is a cross-sectional portion of circuit (202). Therefore, typical planar ion-milling techniques yield cross-sectional TEM samples.
Often, a planar-view TEM sample may be desired over a cross-sectional view, due to the larger field of view offered by the former. However, as will be appreciated, current FIB/SEM techniques are not suitable for preparation of planar-view TEM samples.